Technical Specifications of AGEIA PhysX
The Gaming Power Triangle concept suggested by AGEIA Technologies implies that the gaming system should consist of three major parts in order to ensure that we achieve maximum realism. Each of these components is responsible for processing a certain part of the game.

The CPU works with the gaming process and artificial intelligence calculations. The graphics processor renders and displays the gaming scene and the PPU (Physics Processing Unit) has to calculate the physics model of the gaming world. In other words, the PPU in this concept is responsible for the movements and interaction of all objects in the game starting with the models of the players and monsters and finishing with the liquids and scattered pieces of broken or destroyed objects. This task requires huge computational power to, but will the solution from AGEIA be powerful enough to ensure this potential?
Unfortunately, we do not have any detailed information about the PhysX chip architecture that is the heart of AGEIA physics accelerator, we can just share with you the major technical specifications of the new PPU (Physics Processing Unit).
AGEIA PhysX physics processor is manufactured by TSMC using 0.13micron technology and consists of 125 million transistors. It is a relatively small number of transistors compared with contemporary GPUs (ATI R580, for instance, features close to 400 million transistors), but is quite comparable with the number of transistors insingle-core CPUs. Although in the latter case the majority of transistors are used for L2 cache, while the majority of PhysX transistors build the computational cores, and unfortunately we don’t know how many of those there are inside a single PhysX processor. The developer claims there are dozens of them. Since these are not very complex FP32 math1ematical units, there can be quite a lot of them actually, up to 20 or even more.
The clock frequency of the AGEIA chip is unknown. Since there are a lot of computational cores and the processor is manufactured with far not the today’s finest production technology, the working frequency may not be too high. As for the performance of the PhysX processor, we know it: the chip can execute up to 20 billion instructions per second. If we take the data from AGEIA for granted, this should be enough to calculate:
- 530 million simple “sphere” collisions per second;
- 533 thousand collisions of more complex objects per second.
Note that the number of object collisions will hardly ever get close to the second number in real games, so I don’t think we should be concerned about insufficient performance level of AGEIA PhysX processor.
The processor is equipped with the GDDR3 controller that communicates with the memory via the 128-bit bus. The memory frequency is 366 (733) MHz and the peak memory bus bandwidth equals 11.7GB/s. While top-of-the-line contemporary graphics cards boast over 50GB/s memory bus bandwidth, this number is relatively small, but AGEIA PhysX is very unlikely to suffer from insufficient memory bus bandwidth. Firstly, the PPU doesn’t need to transfer textures (which eats up a lot of memory). And secondly, AGEIA physics accelerator supports regular 32bit PCI interface with 133MB/s bandwidth, so it will turn into a real bottleneck much sooner than the local memory on the accelerator card.
The fact that they used PCI interface indicates that the physics accelerator doesn’t have to shift a lot of data back and forth to the other components of the Gaming Power Triangle. AGEIA, however, claims that the PCI bus bandwidth may become a bottleneck in some games. Here it is important to mention that the early AGEIA PhysX samples supported PCI Express x1, although the final modifications of this accelerator didn’t have it any more for some reason.



