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Advanced Micro Devices, the world’s second largest supplier of x86 central processing units, will officially unveil its AMD Athlon II X2 and AMD Phenom II X2 processors on June 2, 2009, according to sources close to the chipmaker. The new chips are expected to improve the company’s positions in the entry level CPU market segment.

The first two chips to be announced are AMD Athlon II X2 250 (Regor, 3000MHz, 1MB per core L2 cache, 65W TDP) and AMD Phenom II X2 550 (Callisto, 3100MHz, 512KB per core L2 cache, 6MB shared L3 cache, 80W TDP). Both chips will feature AM3 form-factor and will support both DDR2 and DDR3 memory. The microprocessors are based on the latest micro-architecture and are made using 45nm process technology.

Earlier AMD planned to release its code-named AMD Athlon II X4 600-series (Propus), a quad-core processor with dual-channel DDR2/DDR3 memory controller (depending on platform) and 2MB L2 cache (512KB per core), and Athlon II X3 400-series (Rana) triple-core central processing unit with DDR2/DDR3 memory controller (depending on platform) and with 1.5MB L2 cache in April, whereas the dual-core Regor was scheduled for June launch. However, the latest plans of Advanced Micro Devices seen by X-bit labs indicate that the world’s second largest maker of x86 microprocessors will only release Propus and Rana in August-September timeframe, more or less inline with the company’s new mainstream desktop platform code-named Pisces.

AMD did not comment on the news-story.

Tags: AMD, Athlon, Propus, Heka, Regor, Callisto, 45nm

Discussion

Comments currently: 7
Discussion started: 05/14/09 02:45:13 PM
Latest comment: 05/18/09 03:05:35 AM
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[1-2]

1. 
It's easy to see that AMD has no problem in clocking it's CPU's in the 3 - 3,8 GHz range and that's why their low-mid-end products are feature "handicapped" and not frequency lacking. The Phenom II sales went well so now that they have gathered enough partially defective Phenom 2 Quads, they are able to provide the distribution channel Dual and Tri core CPUs in sufficient quantities. I'm very interested in the performance of the series that have no L3 Cache as , in my opinion, the introduction of the L3 Cache concept in K10 architecture is what delayed the launch of Barcelona by complicating the design. It also got the die size bigger, brought the frequency down and induced more latency.

I definitely thing that AMD would have been better of with a K10 that had 3-4 MB L2 Cache and a better memory controller . The money spent on the L3 Cache design and research were a waste .
[Posted by: East17  | Date: 05/14/09 02:45:13 PM]
+ expand thread (3 answers)

2. 
I think there was a small omission in the article ..

The fragment in question is : "AMD Phenom II X2 550 (Callisto, 3100MHz, 1MB L2 cache, L3 cache, 80W TDP)."

I don't see any info about the quantity of the L3 cache ... Is it still unknown ?


[Posted by: East17  | Date: 05/14/09 02:48:00 PM]
+ expand thread (2 answers)

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