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Sources disclosed Intel’s plans to finally unveil its code-named Canterwood-ES chipset for entry-level servers in late fourth quarter this year under Intel E7210 official brand-name. The part will support 800MHz Quad Pumped Bus and Prescott processors. The E7210 will be Intel’s major platform for 1U/Rack servers until it is substituted by the code-named Copper River core-logic in Q3 2004.

We originally mentioned Intel’s Canterwood-ES chipset in March this year and even brought you the clear specifications of the part. Nothing changed from that time – the MCH will still support processors with 533, 800MHz QPB, dual-channel PC2700 or PC3200 memory with ECC support, CSA bus for Kenai-II Gigabit Ethernet controller as well as PAT, the main feature of the i875P and E7210 core-logic designs.

The difference between “Canterwood” i875P and E7210 chipsets for desktop and server applications respectively lies in I/O controllers: i875P comes with ICH5R that supports USB 2.0 as well as Serial ATA-150 RAID, while for the UP Rack server market, Canterwood-ES may be paired with the ICH-S (Hance Rapids) South Bridge, which provides 64-bit PCI required by entry-level servers.

The E7210 will be priced at $44, sources indicated. The cost makes sense since the core-logic is mostly intended for cost-effective Pedestal or 1U Rack servers at $700-$800 or $1000-$1200 price-points respectively.

The E7210 will not live too long life serving Intel Prescott processors at speeds of up to 3.80GHz and above. In the third quarter of 2004 Intel will introduce a new Copper River chipset to work with both higher-end Prescott processors as well as Tejas chips coming out the fourth quarter next year.

Discussion

Comments currently: 1
Discussion started: 10/04/03 10:59:45 AM
Latest comment: 10/04/03 10:59:45 AM

[1-1]

1. 
*Thinking out loud*

Hmmm, release samples of the P4 EE, to demostrate the performance of future Xeons (800Mhz FSB)...Is that what we'll be expecting from 800Mhz FSB Xeons?

*Thinking out loud*

The real question is...

Are they (Intel) gonna stick with the current socket format for Xeons?
[Posted by: 22  | Date: 10/04/03 10:59:45 AM]

[1-1]

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